Under “Chip to Start-up (C2S) Programme”, central government is seeking application from 100 start-ups, MSMEs, R&D organisations and academia to train 85,000 engineers in very-large-scale integration (VLSI) and embedded system design areas.

Chip to Start-up (C2S) Programme

• The C2S programme will result in development of 175 ASICs (application-specific integrated circuits), IP core repository and working prototypes of 20 systems on chips (SoC), for a period of five years.
• It will be a step towards leapfrogging in Electronics System Design & Manufacturing (ESDM) space by infusing the culture of SoC/System Level Design at Bachelors, Masters and Research level.
• It will also help in the growth of Start-ups involved in fabless design.
• The programme also addresses each entity of value chain in electronics namely, quality manpower training, research & development, System design, hardware IPs design, Prototype design, application-oriented R&D, and deployment.

Three categories of the proposals

Under C2S programme, three proposals are invited in three categories, on the basis of institutions’ expertise, technology readiness level (TRL) and design experience:

1. Design and development of SoCs/systems/ASICs/Reusable IP Core(s)
2. Development of application-oriented working prototype of IPs/SoCs/ASICs.
3. Proof of concept-oriented R&D of ASICs/FPGAs.

Which is the nodal agency to implement C2S programme?

The nodal agency for implementation of C2S programme is C-DAC (Centre for Development of Advanced Computing). C-DAC is a scientific society operating under MeitY.